1. Field of the Invention
The present invention relates to a demodulation and roll-off filter apparatus for performing a demodulation process and a roll-off filter process on a received signal by digital signal processing for use with a modem (modulation and demodulation unit) or the like.
2. Description of the Related Art
Modems which transmit and receive data to and from analog voice band lines such as public telephone lines and dedicated lines have been used.
In recent years, modems which encode and decode digital signals have been formed into LSI chips so as to reduce the size and cost thereof.
In a decoding process for a digital signal, as well as to demodulate a received signal which has been modulated, it is necessary to shape the waveform of the received signal which has been distorted over a transmission line by noise and so forth. In particular, it is important to ideally shape a received signal which has been demodulated. This shaping process is accomplished by a special filter process referred to as a roll-off filter process. When digital signal processing in a modem is performed by a DSP (Digital Signal Processor) and a CPU (Central Processing Unit) contained therein, the memory capacity and number of arithmetic operations used for the demodulation process and the roll-off filter process should be reduced so as to reduce the size and cost of the modem.
FIGS. 1 and 2 are schematic diagram showing the construction of a related art reference.
In FIG. 1, reference numeral 1 is an A/D (Analog/Digital) converter 1 used for a receive portion of a modem. The A/D converter 1 samples a signal received from a communication line, converts the signal into a digital value, and sends it to a DSP 2.
A demodulation and roll-off filter portion 3 of the DSP 2 demodulates the digital signal with a demodulation carrier and shapes the waveform of the signal according to a roll-off filter process. The demodulation and roll-off filter portion 3 sends the resultant signal to an Automatic Gain Control (AGC) portion 4. The AGC portion 4 automatically controls the gain of the digital signal so as to keep the level thereof constant. Thereafter, the AGC portion 4 sends the resultant signal to an automatic equalization portion 5. The automatic equalization portion 5 equalizes the received signal. Thus, communication data is reproduced.
As shown in FIG. 2, the demodulation and roll-off filter portion 3 comprises a demodulation portion and a transversal filter- In the demodulation portion, a multiplication portion 30 multiplies a received signal R by the cosine component of the demodulation carrier and outputs a real component R. Hereinafter, the cosine component is referred to as the cos carrier. On the other hand, a multiplication portion 32 multiplies the received signal R by the negative of the sine component of the demodulation carrier and outputs an imaginary component I. Hereinafter, the negative sine component is referred to as the -sin carrier. For the real component R and the imaginary component I, a wave-shape process, an automatic gain control process, and an automatic equalization process are performed as a roll-off filter process. This roll-off filter process will be described later. For the real component R and imaginary component I, a data reproduction process (which is not shown in the figure) is executed. Thus, communication data is reproduced.
For the real component R and imaginary component I which are sent from the multiplication portions 30 and 32, a roll-off filter process is performed by a transversal filter with, for example, eight taps.
The real component R is serially inputted to taps A8, A7, . . . , A2, and A1, each of which performs a delay process of a predetermined time (T/6). The tap outputs A8 to A1 are multiplied by tap coefficients C1 to C8, respectively. An addition portion 31 adds the multiplication outputs a8, a7, . . . , a2, and a1. Thus, a real output X is obtained as the result of the additions. In the multiplication process and addition process, for a sample sequence of the outputs of the taps A8 to A1, a process for decimating samples at intervals of one discrete time apart is executed. This process is referred to as the 1/2 decimation process.
On the other hand, the imaginary component I is serially inputted to taps B8, B7, . . . , B2, and B1, each of which executes a delay process of T/6. The tap outputs B8 to B1 are multiplied by tap coefficients C1 to C8, respectively. An addition portion 33 adds the multiplication outputs b8, b7, . . . b2, and b1. Thus, an imaginary output Y is obtained as the result of the additions. In the multiplication process and addition process, for a sample sequence of the outputs of the taps A8 to A1, the 1/2 decimation process is executed.
Thus, the waveforms of the real output X and the imaginary output Y are ideally shaped.
In the DSP 2, the taps of the demodulation and roll-off filter portion 3 are constructed of a RAM (Random Access Memory) device. The tap coefficients and the demodulation carrier are stored in ROM (Read Only Memory) device. The above multiplications are executed by an arithmetic and logic unit in the DSP 2.
However, the above-mentioned related art reference has the following drawbacks.
(1) To raise the data transmission rate over a transmission line with a limited bandwidth, the modulation rate needs to be raised and the roll-off ratio of the roll-off filter process needs to be decreased. However, when the roll-off ratio is decreased, it takes a long time for the impulse response to converge. Thus, the number of taps and coefficients used for the roll-off filter process increases. PA1 (2) When a received signal is modulated according to the FDM (Frequency Division Modulation) system, the amount of attenuation of unnecessary band components needs to be increased so as to obtain a good S/N ratio. Thus, the number of taps and coefficients for the roll-off filter process increases.
As described above, to lower the roll-off ratio or to increase the amount of attenuation of the unnecessary band components, the number of taps and coefficients should be increased to the order of, for example, 400. Thus, the capacity of the RAM device which constructs the taps increases. In addition, the capacity of the ROM device which stores the coefficients increases. Moreover, the number of arithmetic operations increases. The circuit scale of the apparatus increases as a result of the necessity of increasing processors and external RAMs, etc., thereby obstructing the reduction of the size and cost of the apparatus.